1. Technical Field
Embodiments of the disclosure relate to a semiconductor device and a semiconductor system including the same.
2. Related Art
Packaging technologies for putting a high capacity memory and a controller in the same package include an SiP (System in Package) packaging technology and a CoC (Chip on Chip) packaging technology. The SiP packaging technology adopts a scheme that chips are electrically coupled through wire bonding. The CoC packaging technology is most advantageous in realizing the high integration of a memory and a high speed operation between a memory and a controller. This is because the memory and the controller transmit signals including data to each other through micro bump pads.
Since the diameter of a micro bump pad is only several tens of micrometers, properties such as resistance, inductance and parasitic capacitance are low, and thus, it is easy to increase an operation frequency. Therefore, the transmission speed of data may be easily improved by a method of increasing the number of micro bump pads. In the CoC packaging technology, micro bump pads are formed on the memory and the controller. As the micro bump pads formed on the memory and the controller are electrically coupled with each other, the memory and the controller are formed as one chip.
A semiconductor device includes a plurality of memory cells each of which is configured by one transistor and one storage capacitor. The data retention characteristic of a memory cell sensitively changes according to even a temperature. Therefore, it may be necessary to regulate the operating condition of circuit blocks in a semiconductor system, according to a change in the internal temperature of a semiconductor device. In regulating an operating condition according to a change in the internal temperature of a semiconductor system, a temperature sensor such as a digital temperature sensor regulator (DTSR), an analog temperature sensor regulator (ATSR) or a digital temperature compensated self-refresh (DTCSR) is used.